Advanced Engineering Services
The foundation of every reliable high-speed, RF, and high-layer-count board is a stack-up that has been engineered for signal integrity, resin flow, thermal stability, and manufacturability. APTPCB delivers complete stack-up design support from standard FR-4 multilayers to hybrid PTFE backplanes, HDI sequential lamination, rigid-flex transitions, and heavy-copper power boards.
Engineering Foundation
As a leading multilayer PCB manufacturer, APTPCB delivers advanced PCB stack-up design and fabrication to engineering teams across North America, Europe, and the Asia-Pacific. We understand that a circuit board is no longer just a mechanical carrier; it is a critical RF and high-speed digital component. Whether you are designing a compact wearable with HDI any-layer microvias, or deploying a 64-layer server backplane on ultra-low-loss materials, your design's success hinges on the physical stack-up — and our CAM engineering team ensures every layer configuration is validated for impedance control, thermal management, and manufacturability before production begins.
Our factory holds validated pressing recipes and lamination profiles for every major PCB substrate type. We support all mainstream laminates on the market according to your BOM — from standard FR-4 and high-Tg grades through ultra-low-loss high-speed materials, PTFE/ceramic-filled RF laminates, polyimide flex films, and metal-core thermal substrates. If your design specifies a particular material from any global supplier, we can source it and match it to our pressing profiles. For cost optimization, we specialize in hybrid material stack-ups, seamlessly combining expensive high-frequency laminates on critical outer layers with cost-effective FR-4 structural cores inside. This upfront engineering prevents costly respins and ensures your board performs exactly as simulated.
Stack-Up Architectures
From standard multilayer FR-4 to complex rigid-flex bookbinder constructions, our factory holds validated pressing recipes for every major stack-up architecture.
| Stack-Up Type | Layer Range | Construction Method | Key Materials | Primary Applications |
|---|---|---|---|---|
| Standard FR-4 Multilayer | 4 – 16 L | Single lamination press cycle with mechanical through-hole vias | Shengyi S1000-2, ITEQ IT-180A, Nan Ya NPG-170/180, Ventec VT-47, KB-6167F | Industrial controls, consumer electronics, automotive ECU, IoT gateways |
| High-Speed / Low-Loss Multilayer | 8 – 20 L | Single lamination with tight registration; spread-glass prepregs; HVLP copper | Megtron 4/6/7, Isola I-Tera MT40 / I-Speed, ITEQ IT-968/988G, Nelco N7000-2 HT, Shengyi S7439G | 10G/25G/100G networking, PCIe Gen4/5/6, DDR5, HPC |
| High-Layer-Count Backplane | 20 – 64 L | Multiple press cycles; extreme aspect-ratio drilling; back-drilling for stub removal | Megtron 6/7, Tachyon 100G, Isola I-Speed, ultra-low-loss prepregs | Data center switch fabrics, telecom backplanes, server motherboards, supercomputing |
| HDI (1+N+1 / 2+N+2 / Any-Layer) | 4 – 24 L | Sequential lamination; laser-drilled blind/buried microvias; VIPPO (via-in-pad plated over); ABF build-up film for any-layer | Standard FR-4 cores + RCC or ABF build-up layers; thin prepregs (1080, 106) | Smartphones, wearables, SSD controllers, fine-pitch BGA breakout, compact medical devices |
| Flex PCB | 1 – 8 L | Polyimide core with adhesive or adhesiveless construction; coverlay instead of solder mask | DuPont Pyralux AP/LF/HT, Panasonic Felios R-F775, Shengyi SF305C, Taiflex, Doosan FCCL | FPC cables, dynamic hinge connections, wearable sensors, camera modules |
| Rigid-Flex | 4 – 20 L | Bookbinder or cross-hatch construction; rigid FR-4 sections bonded to flex polyimide sections with no-flow prepreg at transition zones | FR-4 cores + polyimide flex cores + no-flow / low-flow prepregs (e.g., Isola 185HR NF, Panasonic R-F661T) | Aerospace interconnects, military avionics, foldable electronics, robotic arms, implantable medical devices |
| Aluminum MCPCB | 1 – 4 L | Aluminum base plate (1.0 – 3.2 mm) with thermally conductive dielectric layer (1 – 10 W/mK) and copper circuit layer | Bergquist HT-04503, Ventec VT-4B series, Totking TK series, Shengyi SA, Laird Tgrease | High-power LED lighting, automotive headlamps, power converters, motor drives |
| Copper-Base MCPCB | 1 – 2 L | Copper base plate (1.0 – 3.0 mm) with thin dielectric; thermal conductivity 2 – 4× higher than aluminum MCPCB | Copper C1100 base + ceramic-filled dielectric; DBC (Direct Bond Copper) for highest performance | IGBT modules, high-power RF amplifiers, laser diode carriers, EV power electronics |
| Heavy Copper | 2 – 10 L | 3 oz to 20 oz copper on inner/outer layers; extreme resin-fill prepregs to prevent voids; mixed copper weights (heavy + standard) possible within a single stack-up | High-resin-content prepregs (106, 1080); high-Tg FR-4 or polyimide substrates; any laminate per customer BOM | EV charging stations, solar inverters, industrial motor drives, welding equipment, UPS systems, planar transformers |
| RF Hybrid (PTFE + FR-4) | 4 – 12 L | Mixed-dielectric construction bonding RF laminates on signal layers with FR-4 structural cores; CTE mismatch management with low-flow bondply | Rogers RO4350B, RO4835, RO3003, RT/duroid 5880, Taconic RF-35, TLY, Arlon AD255, DiClad, Isola Astra MT77 | Automotive 77 GHz radar, 5G mmWave base stations, satellite transponders, phased-array antenna |
All stack-up types are available for <a href="/en/pcb/quick-turn-pcb">quick-turn prototyping</a> and volume production. The materials listed above are representative examples — APTPCB supports all mainstream laminates on the market and can source any commercially available material per your BOM. Our CAM team provides a full stack-up diagram in PDF and ODB++ format for your approval before fabrication.
Rigid Multilayer
Standard multilayer stack-ups (4 – 16 layers) use a single lamination press cycle with symmetrical core/prepreg arrangement. The key to a successful standard stack-up is Z-axis symmetry — matching copper weight and dielectric thickness on opposite sides of the board center to prevent warpage during SMT reflow. We specify core and prepreg combinations that balance copper fill ratio with available resin volume to ensure void-free lamination.
High-layer-count backplanes (20 – 64 layers) push every manufacturing parameter to the limit: extreme aspect-ratio through-hole drilling, strict CTE control to prevent plated barrel cracking, back-drilling to remove via stubs on high-speed channels, and precise resin-flow calculations for dozens of prepreg sheets. These boards typically require ultra-low-loss materials (Megtron 6/7, Tachyon 100G) with spread-glass fabrics to minimize skew on differential pairs above 25 Gbps.
HDI Architecture
HDI stack-ups use sequential lamination to build layer by layer, creating blind and buried microvia interconnects that enable ultra-dense routing.
One sequential lamination cycle adds one build-up layer on each side of the core. Laser-drilled blind microvias connect the build-up layer to the first inner layer. This is the most common and cost-effective HDI structure — suitable for smartphones, compact IoT, and moderate-density BGA fan-out. Typical via diameter: 75 – 100 µm.
Two sequential press cycles per side. Microvias can be stacked (via-on-via) or staggered (offset). Stacked microvias require copper-filled via processing (VIPPO). This structure handles 0.4 mm pitch BGAs and provides additional routing channels for high-pin-count ICs. Two press cycles roughly double the cost of 1+N+1.
Three build-up layers per side for the highest routing density on a core-based construction. Enables 0.3 mm pitch and below. Each additional press cycle increases cost and lead time significantly but provides unmatched interconnect density for advanced mobile processors and chiplet packaging substrates.
All layers are build-up layers — no conventional core. Every layer connects to every other layer through stacked copper-filled microvias, using ABF (Ajinomoto Build-up Film) or ultra-thin RCC. This is the most advanced HDI architecture, used for the densest semiconductor package substrates and next-generation mobile SoC boards.
Flex & Rigid-Flex
Flex PCB stack-ups replace FR-4 glass-epoxy with polyimide film (PI, Dk ≈ 3.2 – 3.5) as the base dielectric. Single-layer and double-layer flex use adhesiveless polyimide-copper laminates for the thinnest possible construction. Multilayer flex (3 – 8 layers) bonds multiple PI cores with adhesive or acrylic bonding films. Coverlay film replaces solder mask to maintain flexibility. Impedance control on flex requires trace-width adjustment for the lower Dk of polyimide.
Rigid-flex stack-ups combine rigid FR-4 multilayer sections with flexible polyimide sections in a single integrated board. The construction uses "bookbinder" or "looseleaf" methods where flex layers pass continuously through the rigid zones while rigid-only layers are laminated above and below. No-flow or low-flow prepregs at transition zones prevent resin from bleeding onto the flex area and making it brittle. We design hatched ground planes on flex layers to maintain controlled impedance without sacrificing bend radius performance.
Thermal & Power
Aluminum MCPCB stack-ups bond a copper circuit layer to an aluminum base plate through a thermally conductive dielectric layer. Standard thermal conductivity ranges from 1 – 3 W/mK for general LED applications, while premium ceramic-filled dielectrics reach 5 – 10 W/mK for high-power RF amplifiers and IGBT modules. Copper-base MCPCBs offer 2 – 4× the thermal performance of aluminum and are used in the most demanding thermal applications like laser diodes and EV power stages.
Heavy copper stack-ups (3 oz – 20 oz) carry high currents within a multilayer board. The main fabrication challenge is resin fill — thick copper layers with sparse routing create deep etched gaps that must be completely filled by melting prepreg during lamination. We calculate the copper retention percentage on every layer and select high-resin-content prepregs (106, 1080 styles) to prevent voids and delamination. Mixed copper weights (e.g., 2 oz on signal layers + 10 oz on power layers) are supported within a single stack-up, enabling combined power and control circuits on one board.
RF & Mixed Dielectric
RF hybrid stack-ups place high-frequency PTFE or ceramic-filled laminates (Rogers RO4350B, RO4835, RO3003, RT/duroid 5880, Taconic RF-35, TLY, Arlon AD255, Isola Astra MT77) on the RF signal layers while using cost-effective FR-4 for inner structural, power, and digital control layers. This approach delivers the RF performance of a full-PTFE board at a fraction of the cost.
The primary engineering challenge is CTE mismatch — PTFE materials expand at different rates than FR-4 during the heat of lamination and SMT reflow. We manage this by selecting compatible low-flow bondply materials, designing symmetrical constructions to balance the mechanical stress, and running thermal cycling validation on first articles. For high-frequency PCBs at 77 GHz automotive radar or 5G mmWave frequencies, we also specify HVLP copper foil and use frequency-dependent Dk data in the impedance simulation to ensure accuracy at the actual operating band.
Manufacturing Capability
Our lamination equipment and process controls support the full range of PCB stack-up complexity.
| Parameter | Standard | Advanced | Notes |
|---|---|---|---|
| Maximum Layer Count | 16 Layers | 64 Layers | 64L backplanes require ultra-low-loss materials and multiple press cycles |
| Board Thickness Range | 0.4 – 3.2 mm | 0.20 – 8.0 mm | 0.20 mm for ultra-thin builds; 8.0 mm for thick backplanes |
| Minimum Core Thickness | 0.1 mm (4 mil) | 0.05 mm (2 mil) | 2 mil cores for HDI and mobile applications |
| Minimum Prepreg Thickness | 0.075 mm (3 mil) | 0.05 mm (2 mil) | Thin prepregs required for tight dielectric control in high-speed designs |
| Sequential Lamination Cycles | 1 cycle (1+N+1) | Up to 3 SBU (sequential build-up) | Stacked and staggered microvias supported; each cycle adds ~3 – 5 days lead time |
| Maximum Copper Weight | 2 oz (70 µm) | Up to 20 oz (700 µm) | Mixed weights supported within a single stack-up; inner and outer layers both to 20 oz |
| Min Trace / Space | 3 / 3 mil | 2 / 2 mil | Both inner and outer layers; LDI imaging at 2/2 mil |
| MCPCB Base Thickness | 1.0 – 1.6 mm Al | Up to 3.2 mm Al / 3.0 mm Cu | Copper base available for highest thermal demands |
| Flex Bend Radius | 10× material thickness | 6× material thickness | Dynamic flex (repeated bending) requires wider radius; adhesiveless construction preferred |
| Rigid-Flex Transition Zones | Standard taper | Controlled impedance through transition | No-flow prepreg prevents resin bleed; hatched ground maintains Z₀ on flex |
| Thickness Tolerance | ± 10% (≥ 1.0 mm board) | ± 0.10 mm (< 1.0 mm board) | Per APTPCB standard; tighter tolerance available on request for connector mating and card-edge applications |
Upload your schematic or constraint list — our CAM team will propose an optimized stack-up with material recommendation, layer diagram, and DFM review within one business day.
Every rigid multilayer PCB is built from two fundamental elements: cores and prepregs. A core is a fully cured laminate with copper foil bonded to both sides — it is mechanically rigid and dimensionally stable. A prepreg (pre-impregnated fabric) is woven fiberglass cloth coated with uncured or semi-cured (B-stage) resin — it is soft and tacky. During the lamination press cycle, heat and pressure melt the prepreg resin, which flows to fill the etched gaps in adjacent copper layers, then cures permanently to bond the stack-up into a solid monolithic structure.
The choice of glass fabric style directly affects the dielectric thickness and resin content. Common prepreg styles include 106 (high resin, thin), 1080 (medium resin, thin), 2116 (standard, medium thickness), 7628 (thick, low resin), and spread-glass variants 1035, 1067, and 1078 for improved Dk uniformity in high-speed applications. Our CAM team selects the specific combination of core thicknesses and prepreg styles to achieve your required total board thickness, dielectric spacing, and resin fill volume.
APTPCB supports all mainstream rigid and flex laminates on the market according to your BOM — and can source any commercially available material to match your design requirements. We maintain pressing recipes and inventory relationships with major laminate families worldwide. Standard FR-4 grades (such as Shengyi S1000-2, ITEQ IT-180A, Nan Ya NPG-170/180, Ventec VT-47, Kingboard KB-6167, and equivalents) serve the majority of industrial and consumer applications with Tg from 130°C to 180°C+. Mid-loss materials (such as Isola 370HR, Shengyi S1000-2ME, ITEQ IT-958G, and equivalents) bridge the gap for 5 – 10 Gbps designs. Low-loss and ultra-low-loss grades (Megtron 4/6/7, I-Tera MT40, I-Speed, ITEQ IT-968/988G, Nelco N7000-2 HT, Tachyon 100G, and equivalents) handle the most demanding data center and HPC applications.
For RF and microwave stack-ups, we process the full range of PTFE and ceramic-filled laminates: Rogers RO4350B, RO4835, RO3003, RT/duroid 5880, Taconic RF-35, TLY, TLX, Arlon AD255, DiClad 880, Isola Astra MT77, Teflon PTFE, and equivalents. Flex and rigid-flex stack-ups use polyimide films from DuPont (Pyralux AP, LF, HT), Panasonic (Felios R-F775), Shengyi (SF305C), Taiflex, Doosan, and other qualified suppliers. Metal-core substrates include Bergquist, Ventec VT-4B, Totking, Shengyi SA, Laird, Henkel, and equivalents. If your design specifies a material not listed here, contact our CAM team — we can evaluate and source virtually any commercial laminate, prepreg, or bonding film to meet your exact requirements.
The single most important rule in multilayer stack-up design is symmetry about the board's center line. Match copper weights, dielectric thicknesses, and material types on opposite sides. An asymmetric stack-up will bow and twist during SMT reflow because the two halves expand and contract at different rates. If your design inherently requires asymmetry (e.g., more signal layers on one side), discuss it with our CAM team — we can recommend compensating strategies such as adding dummy copper fill or adjusting prepreg styles.
Uneven copper distribution between adjacent layers creates resin flow imbalances during lamination. Layers with dense routing consume more resin to fill etched gaps, while layers with large copper pours consume less. This is especially critical in heavy copper builds (3 – 20 oz) where deep etched channels demand high-resin-content prepregs. We analyze the copper retention percentage on every layer and select prepreg resin content accordingly. Adding copper fill (thieving) to sparse areas also helps equalize the copper distribution and prevents localized resin starvation that leads to voids and CAF (Conductive Anodic Filament) failures.
Every high-speed signal layer should be directly adjacent to an unbroken reference (ground or power) plane. This pairing ensures consistent impedance control and provides a low-inductance return current path. Avoid placing two signal layers adjacent to each other without a plane between them — this causes severe crosstalk and makes impedance control impossible. A typical 8-layer high-speed stack-up follows the pattern: Signal – Ground – Signal – Power – Power – Signal – Ground – Signal.
Applications
20 – 64 layer ultra-low-loss stack-ups for 100G/400G Ethernet. Megtron 6/7 with spread-glass, back-drilled stubs, and tight TDR-verified impedance control on 56G/112G PAM4 lanes.
Hybrid Rogers/FR-4 stack-ups for 77 GHz radar; heavy copper multilayer for BMS; aluminum MCPCB for LED headlamps. All meeting AEC-Q100 thermal cycling requirements.
Rigid-flex bookbinder stack-ups for 3D avionics enclosures. Polyimide and hybrid PTFE constructions with microsection verification per MIL-PRF-31032 and IPC-6012DS Class 3/A.
Ultra-thin flex stack-ups for implantable sensors; HDI any-layer for portable ultrasound; rigid-flex for endoscope cameras. ISO 13485 traceability on every layer configuration.
Heavy copper (3 – 20 oz) stack-ups with mixed copper weights for combined power and control circuits. Thermal management through embedded copper coins and metal-core substrates.
HDI 2+N+2 and any-layer stack-ups with VIPPO microvias for ultra-dense SoC breakout. Thin board profiles (0.4 – 0.8 mm) with impedance-controlled MIPI and USB lanes.
FAQ
Interactive Tool
Select your stack-up type to see the typical construction method, cost drivers, and engineering considerations.
Global Engineering Reach
Hardware teams across telecom, automotive, aerospace, and data center industries rely on APTPCB for complex multilayer stack-up engineering with same-day DFM review and global logistics.
Data center architects in Silicon Valley, defense contractors on the East Coast, and automotive Tier-1 suppliers in Detroit source our high-layer-count backplane and hybrid RF stack-ups for next-generation platforms.
Automotive radar developers in Stuttgart, 5G infrastructure teams in Stockholm, and medical device companies in the UK rely on our rigid-flex and hybrid PTFE stack-up expertise.
Consumer electronics innovators and server OEMs across APAC leverage our HDI any-layer and high-speed stack-up capabilities for compact mobile devices and hyperscale server boards.
Aerospace radar programs and satellite communication designers in the region source our multi-material hybrid stack-ups with microsection verification and MIL-spec documentation.
Share your layer count, material preference, and design constraints. Our CAM team will return a detailed stack-up diagram, material recommendation, and DFM review within one business day.
