[{"data":1,"prerenderedAt":397},["ShallowReactive",2],{"blog-spi-vs-aoi-when-to-run-each-in-pcba-en":3,"header-nav-en":69},{"title":4,"description":5,"date":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"tags":13,"slug":19,"jsonld":20},"SPI vs AOI in PCBA: When to Run Each and What Each Method Actually Proves","A practical engineering guide to SPI vs AOI in PCBA, covering what each method checks, when each should run, and why neither method should be treated as a complete quality plan by itself.","2026-05-13","technology","/assets/img/blogs/2025/11/spi-vs-aoi-when-to-run-each-in-pcba.png",11,2049,"PT11M","\u003Cul>\n\u003Cli>SPI and AOI are both inspection methods, but they belong to \u003Cstrong>different stages of the assembly flow\u003C/strong>.\u003C/li>\n\u003Cli>SPI belongs to \u003Cstrong>solder paste control before placement and reflow\u003C/strong>. AOI belongs to \u003Cstrong>visible assembly inspection around placement or after reflow\u003C/strong>.\u003C/li>\n\u003Cli>The key engineering boundary is not \u003Ccode>SPI or AOI\u003C/code>. It is \u003Cstrong>what defect class is being checked at what stage\u003C/strong>.\u003C/li>\n\u003Cli>A board can pass SPI and still fail AOI. A board can pass AOI and still fail X-ray, ICT, flying probe, or functional test.\u003C/li>\n\u003Cli>The safest planning model is to use SPI and AOI as separate layers inside a larger quality path rather than to collapse them into one generic inspection claim.\u003C/li>\n\u003C/ul>\n\u003Cblockquote>\n\u003Cp>\u003Cstrong>Quick Answer\u003C/strong>\nSPI should run when the team needs to confirm that solder paste deposition is under control before later assembly stages hide the printing result. AOI should run when the team needs optical evidence about visible placement, polarity, geometry, and visible solder features. They are not interchangeable methods. SPI answers a paste-process question before reflow; AOI answers a visible-assembly question later in the build flow.\u003C/p>\n\u003C/blockquote>\n\u003Cp>For the broader inspection-and-test stack that connects SPI, AOI, X-ray, ICT, flying probe, functional test, and release gates, start with the \u003Ca href=\"/en/blog/pcba-assembly-test-quality-guide\">PCBA Assembly Test and Quality Guide\u003C/a>.\u003C/p>\n\u003Ch2 id=\"table-of-contents\" data-anchor-en=\"table-of-contents\">Table of Contents\u003C/h2>\n\u003Cul>\n\u003Cli>\u003Ca href=\"#first-review\">What should engineers review first?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#what-spi-checks\">What does SPI actually check?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#what-aoi-checks\">What does AOI actually check?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#method-boundaries\">How do SPI and AOI differ in the build flow?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#when-spi-matters-more\">When should a build rely more on SPI?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#when-aoi-matters-more\">When should a build rely more on AOI?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#freeze-before-release\">What should be frozen before using either result as release evidence?\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#next-steps\">Next steps with APTPCB\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#faq\">FAQ\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#references\">Public references\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"#author\">Author and review information\u003C/a>\u003C/li>\n\u003C/ul>\n\u003Ca id=\"first-review\">\u003C/a>\n\u003Ch2 id=\"what-should-engineers-review-first\" data-anchor-en=\"what-should-engineers-review-first\">What should engineers review first?\u003C/h2>\n\u003Cp>Start with \u003Cstrong>inspection stage, defect visibility, process risk, and downstream dependency\u003C/strong>.\u003C/p>\n\u003Cp>That order matters because \u003Ccode>SPI vs AOI\u003C/code> is often framed as if both methods are doing the same job. They are not.\u003C/p>\n\u003Cp>The better question is:\u003C/p>\n\u003Cp>\u003Cstrong>Which defect class needs evidence first, and at what point in the assembly flow can that evidence still be trusted?\u003C/strong>\u003C/p>\n\u003Cp>The first review questions should be:\u003C/p>\n\u003Col>\n\u003Cli>Is the main concern solder paste deposition before placement and reflow?\u003C/li>\n\u003Cli>Is the main concern visible component placement, polarity, geometry, or visible solder features?\u003C/li>\n\u003Cli>Are hidden-joint packages or electrical faults still going to require later gates?\u003C/li>\n\u003Cli>Is this build still in first-build learning, or is it already operating as a more stable repeat process?\u003C/li>\n\u003C/ol>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Review axis\u003C/th>\n\u003Cth>What to check\u003C/th>\n\u003Cth>Why it matters\u003C/th>\n\u003Cth>What SPI or AOI alone does not prove\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>Inspection stage\u003C/td>\n\u003Ctd>Whether the check happens before reflow or after assembled features are visible\u003C/td>\n\u003Ctd>Stage determines what the system can actually inspect\u003C/td>\n\u003Ctd>Full board release confidence\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Defect class\u003C/td>\n\u003Ctd>Whether the target problem is paste-related or visible assembly-related\u003C/td>\n\u003Ctd>Keeps the method aligned with the real risk\u003C/td>\n\u003Ctd>Hidden-joint integrity or powered behavior\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Process risk\u003C/td>\n\u003Ctd>Whether the build is more likely to fail at print, placement, or later stages\u003C/td>\n\u003Ctd>Controls where early evidence is most valuable\u003C/td>\n\u003Ctd>That one inspection layer covers everything\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>Downstream dependency\u003C/td>\n\u003Ctd>Whether X-ray, electrical test, or FCT still owns later proof\u003C/td>\n\u003Ctd>Inspection is only part of the quality stack\u003C/td>\n\u003Ctd>That inspection alone makes later gates unnecessary\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Ca id=\"what-spi-checks\">\u003C/a>\n\u003Ch2 id=\"what-does-spi-actually-check\" data-anchor-en=\"what-does-spi-actually-check\">What does SPI actually check?\u003C/h2>\n\u003Cp>SPI checks \u003Cstrong>solder paste deposition before later stages of the SMT flow\u003C/strong>.\u003C/p>\n\u003Cp>That makes SPI a process-control layer rather than a final assembled-board verdict.\u003C/p>\n\u003Cp>In practical terms, SPI is used to look at whether paste printing appears to be under control before the board moves forward. That is why SPI belongs upstream of placement and reflow in the inspection sequence.\u003C/p>\n\u003Cp>What SPI does \u003Cstrong>not\u003C/strong> do:\u003C/p>\n\u003Cul>\n\u003Cli>verify final component placement\u003C/li>\n\u003Cli>verify visible post-reflow assembly geometry\u003C/li>\n\u003Cli>inspect hidden joints after soldering\u003C/li>\n\u003Cli>prove assembled-board electrical behavior\u003C/li>\n\u003C/ul>\n\u003Cp>This is the most common mistake in weak SPI articles: they describe SPI as if it proves assembly quality in general. It does not. It proves an earlier and narrower process question.\u003C/p>\n\u003Ca id=\"what-aoi-checks\">\u003C/a>\n\u003Ch2 id=\"what-does-aoi-actually-check\" data-anchor-en=\"what-does-aoi-actually-check\">What does AOI actually check?\u003C/h2>\n\u003Cp>AOI checks \u003Cstrong>visible assembly features\u003C/strong>.\u003C/p>\n\u003Cp>That usually includes:\u003C/p>\n\u003Cul>\n\u003Cli>component presence\u003C/li>\n\u003Cli>orientation and polarity\u003C/li>\n\u003Cli>placement shift or skew\u003C/li>\n\u003Cli>visible solder-feature issues\u003C/li>\n\u003Cli>some visible anomalies on the assembled board\u003C/li>\n\u003C/ul>\n\u003Cp>AOI is strongest when the defect can be seen optically on the board surface.\u003C/p>\n\u003Cp>What AOI does \u003Cstrong>not\u003C/strong> do:\u003C/p>\n\u003Cul>\n\u003Cli>prove solder paste was correct before reflow\u003C/li>\n\u003Cli>replace hidden-joint inspection under concealed packages\u003C/li>\n\u003Cli>replace electrical fault screening\u003C/li>\n\u003Cli>replace functional behavior validation\u003C/li>\n\u003C/ul>\n\u003Cp>This is why AOI is best understood as a visible-defect screening layer, not as a blanket claim that the board has already been fully tested.\u003C/p>\n\u003Ca id=\"method-boundaries\">\u003C/a>\n\u003Ch2 id=\"how-do-spi-and-aoi-differ-in-the-build-flow\" data-anchor-en=\"how-do-spi-and-aoi-differ-in-the-build-flow\">How do SPI and AOI differ in the build flow?\u003C/h2>\n\u003Cp>The stage split is the main point.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Method\u003C/th>\n\u003Cth>What it mainly answers\u003C/th>\n\u003Cth>Where it sits\u003C/th>\n\u003Cth>What it does not replace\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>SPI\u003C/td>\n\u003Ctd>Whether solder paste deposition is in control before later assembly stages\u003C/td>\n\u003Ctd>Before placement and reflow\u003C/td>\n\u003Ctd>AOI, X-ray, or electrical test\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>AOI\u003C/td>\n\u003Ctd>Whether visible placement, geometry, polarity, and solder features look acceptable\u003C/td>\n\u003Ctd>Around placement or after reflow, depending on the inspection plan\u003C/td>\n\u003Ctd>SPI, X-ray, or electrical test\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>That means the relationship is not really \u003Ccode>SPI vs AOI\u003C/code> in a winner-takes-all sense.\u003C/p>\n\u003Cp>The relationship is:\u003C/p>\n\u003Cul>\n\u003Cli>SPI catches an upstream process problem before it becomes a later assembly problem\u003C/li>\n\u003Cli>AOI screens the visible assembled result after placement or soldering has created something worth visually checking\u003C/li>\n\u003C/ul>\n\u003Cp>The real failure chain starts when paste control is weak but the build is asked to rely on later inspection alone. Paste volume, offset, or bridging risk leaves the stencil stage without being corrected. Reflow then turns that print variation into visible solder defects, skewed parts, or bridges that AOI has to catch after the process window has already narrowed. If those visible defects survive or are misread, the problem can continue into electrical test or debug. That is why SPI and AOI are complementary. One controls the upstream print condition before it becomes a downstream assembly defect, and the other confirms what the assembled surface actually looks like after placement and reflow.\u003C/p>\n\u003Cp>The cost difference becomes brutal on dense boards carrying 0.4 mm pitch BGA sites or QFN packages with large bottom thermal pads. A slightly clogged stencil aperture can quietly print insufficient paste volume onto one critical pad row. If SPI catches that defect before placement, the recovery path is almost trivial: wipe the bare board clean, reprint, and move on. The practical recovery cost is essentially \u003Ccode>$0 cost\u003C/code> compared with any downstream repair. If the line skips SPI and waits for AOI to discover the result later, the defect is no longer a printing deviation. It has already been converted by reflow into an \u003Ccode>Open joint\u003C/code>, a \u003Ccode>Tombstone\u003C/code>, or another post-solder defect inside a crowded assembly zone. Now the only recovery path is \u003Ccode>Thermal rework\u003C/code> on a finished board. That means labor, local reheating, process delay, and a real risk of \u003Ccode>Thermal trauma\u003C/code> to nearby fine-pitch passives and already-stressed solder joints. This is why SPI is a preventive investment and AOI is a lagging indicator. They do not fail at the same cost level.\u003C/p>\n\u003Cp>Related reading:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Ca href=\"/en/pcba/spi-inspection\">SPI Inspection\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/aoi-inspection\">AOI Inspection\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/testing-quality\">Testing & Quality\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/xray-inspection\">X-Ray Inspection\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/blog/aoi-inspection-pcba\">What AOI Inspection in PCBA Checks\u003C/a>\u003C/li>\n\u003C/ul>\n\u003Ca id=\"when-spi-matters-more\">\u003C/a>\n\u003Ch2 id=\"when-should-a-build-rely-more-on-spi\" data-anchor-en=\"when-should-a-build-rely-more-on-spi\">When should a build rely more on SPI?\u003C/h2>\n\u003Cp>SPI matters more when \u003Cstrong>print quality is an early risk that the team wants to catch before placement and reflow hide it\u003C/strong>.\u003C/p>\n\u003Cp>That usually includes:\u003C/p>\n\u003Cul>\n\u003Cli>dense SMT builds\u003C/li>\n\u003Cli>fine-pitch or bottom-terminated package planning\u003C/li>\n\u003Cli>first-build learning where print stability is still being established\u003C/li>\n\u003Cli>assemblies where upstream paste-process control is an important predictor of later solder outcomes\u003C/li>\n\u003C/ul>\n\u003Cp>In that role, SPI is valuable because it helps the team stop a printing problem before it grows into a more expensive downstream defect.\u003C/p>\n\u003Cp>But the language still needs discipline:\u003C/p>\n\u003Cp>\u003Cstrong>SPI is an upstream process-control layer. It is not a substitute for later visible inspection, hidden-joint review, or board-level electrical verification.\u003C/strong>\u003C/p>\n\u003Ca id=\"when-aoi-matters-more\">\u003C/a>\n\u003Ch2 id=\"when-should-a-build-rely-more-on-aoi\" data-anchor-en=\"when-should-a-build-rely-more-on-aoi\">When should a build rely more on AOI?\u003C/h2>\n\u003Cp>AOI matters more when \u003Cstrong>visible assembly correctness is the main concern\u003C/strong>.\u003C/p>\n\u003Cp>That often includes:\u003C/p>\n\u003Cul>\n\u003Cli>placement confirmation\u003C/li>\n\u003Cli>polarity review\u003C/li>\n\u003Cli>visible geometry issues\u003C/li>\n\u003Cli>visible solder-feature anomalies\u003C/li>\n\u003Cli>repeat screening of visible defects before later test layers\u003C/li>\n\u003C/ul>\n\u003Cp>AOI also becomes more important when the goal is to keep visible assembly defects from reaching X-ray, electrical test, or functional validation.\u003C/p>\n\u003Cp>At the same time, AOI becomes less complete when:\u003C/p>\n\u003Cul>\n\u003Cli>hidden-joint packages dominate the risk\u003C/li>\n\u003Cli>the main problem sits earlier in solder paste printing\u003C/li>\n\u003Cli>the main concern is electrical behavior rather than optical appearance\u003C/li>\n\u003C/ul>\n\u003Cp>That is why AOI should be planned as a visible-inspection layer, not as a universal quality endpoint.\u003C/p>\n\u003Ca id=\"freeze-before-release\">\u003C/a>\n\u003Ch2 id=\"what-should-be-frozen-before-using-either-result-as-release-evidence\" data-anchor-en=\"what-should-be-frozen-before-using-either-result-as-release-evidence\">What should be frozen before using either result as release evidence?\u003C/h2>\n\u003Cp>Before SPI or AOI results are used as real release evidence, freeze:\u003C/p>\n\u003Col>\n\u003Cli>the assembly flow stage being inspected\u003C/li>\n\u003Cli>the defect classes each inspection step is expected to own\u003C/li>\n\u003Cli>the package-visibility assumptions, especially where hidden joints matter\u003C/li>\n\u003Cli>the later plan for X-ray, electrical test, or functional validation where required\u003C/li>\n\u003Cli>the release boundary between process control, visible inspection, and final shipment confidence\u003C/li>\n\u003C/ol>\n\u003Cp>If those items are still moving, SPI and AOI can still provide useful process feedback, but their results should not be overstated as full product proof.\u003C/p>\n\u003Ca id=\"next-steps\">\u003C/a>\n\u003Ch2 id=\"next-steps-with-aptpcb\" data-anchor-en=\"next-steps-with-aptpcb\">Next steps with APTPCB\u003C/h2>\n\u003Cp>If your dense PCBA is already suffering from high post-reflow rework rates, or your NPI team is still debating whether fine-pitch packages really justify mandatory SPI before mass build, the real question is not whether SPI sounds nice on paper. It is whether you want to catch a print defect at bare-board stage or pay for \u003Ccode>Thermal rework\u003C/code> after the assembly has already absorbed heat, labor, and schedule risk.\u003C/p>\n\u003Cp>Send the \u003Ccode>Gerber\u003C/code> or \u003Ccode>ODB++\u003C/code> package, stencil intent, and \u003Ccode>BOM\u003C/code> to \u003Ccode>sales@aptpcb.com\u003C/code> or through the \u003Ca href=\"/en/quote\">quote page\u003C/a>.\u003C/p>\n\u003Cp>APTPCB's SMT and quality-engineering team will return an \u003Cstrong>SMT Process Control & Inspection Strategy Review\u003C/strong> within \u003Cstrong>24 hours\u003C/strong>. We will identify which package families must rely on SPI for paste-volume interception, which regions are better covered by AOI, and how to structure the inspection flow for the highest practical \u003Ccode>First-Pass Yield (FPY)\u003C/code> before you commit the build to volume assembly.\u003C/p>\n\u003Cul>\n\u003Cli>\u003Ca href=\"/en/pcba/spi-inspection\">SPI Inspection\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/aoi-inspection\">AOI Inspection\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/testing-quality\">Testing & Quality\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/bga-qfn-fine-pitch\">BGA/QFN Fine-Pitch Assembly\u003C/a>\u003C/li>\n\u003Cli>\u003Ca href=\"/en/pcba/turnkey-assembly\">Turnkey Assembly\u003C/a>\u003C/li>\n\u003C/ul>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Ca id=\"faq\">\u003C/a>\n\u003Ch2 id=\"faq\" data-anchor-en=\"faq\">FAQ\u003C/h2>\n\u003C!-- faq:start -->\n\n\u003Ch3 id=\"is-spi-the-same-as-aoi\" data-anchor-en=\"is-spi-the-same-as-aoi\">Is SPI the same as AOI?\u003C/h3>\n\u003Cp>No. SPI checks solder paste deposition before later SMT stages. AOI checks visible assembly features later in the process.\u003C/p>\n\u003Ch3 id=\"if-a-board-passes-spi-can-it-still-fail-aoi\" data-anchor-en=\"if-a-board-passes-spi-can-it-still-fail-aoi\">If a board passes SPI, can it still fail AOI?\u003C/h3>\n\u003Cp>Yes. A board can pass paste inspection and still develop visible placement or solder-related issues later.\u003C/p>\n\u003Ch3 id=\"if-a-board-passes-aoi-do-i-still-need-x-ray\" data-anchor-en=\"if-a-board-passes-aoi-do-i-still-need-x-ray\">If a board passes AOI, do I still need X-ray?\u003C/h3>\n\u003Cp>Sometimes yes. AOI does not replace hidden-joint inspection where concealed solder areas need evidence.\u003C/p>\n\u003Ch3 id=\"can-aoi-replace-ict-or-flying-probe\" data-anchor-en=\"can-aoi-replace-ict-or-flying-probe\">Can AOI replace ICT or flying probe?\u003C/h3>\n\u003Cp>No. AOI is an optical method. ICT and flying probe are electrical methods for different defect classes.\u003C/p>\n\u003Ch3 id=\"what-is-the-biggest-planning-mistake-in-spi-vs-aoi-discussions\" data-anchor-en=\"what-is-the-biggest-planning-mistake-in-spi-vs-aoi-discussions\">What is the biggest planning mistake in SPI vs AOI discussions?\u003C/h3>\n\u003Cp>Treating them as interchangeable inspection names instead of keeping the stage boundary and defect ownership clear.\u003C/p>\n\u003C!-- faq:end -->\n\n\u003Ca id=\"references\">\u003C/a>\n\u003Ch2 id=\"public-references\" data-anchor-en=\"public-references\">Public references\u003C/h2>\n\u003Col>\n\u003Cli>\u003Cp>\u003Ca href=\"https://kohyoung.com/en/solder-paste-inspection-technology\">Koh Young SPI Technology\u003C/a>\nPublic process-technology anchor for SPI as an upstream solder-paste inspection layer.\u003C/p>\n\u003C/li>\n\u003Cli>\u003Cp>\u003Ca href=\"https://kohyoung.com/en/automated-optical-inspection-technology\">Koh Young AOI Technology\u003C/a>\nPublic process-technology anchor for AOI as a visible optical inspection layer.\u003C/p>\n\u003C/li>\n\u003Cli>\u003Cp>\u003Ca href=\"https://www.ipc.org/TOC/IPC-A-610H-toc.pdf\">IPC-A-610H Table of Contents\u003C/a>\nPublic standards anchor for visible assembly workmanship context.\u003C/p>\n\u003C/li>\n\u003Cli>\u003Cp>\u003Ca href=\"/en/blog/pcba-assembly-test-quality-guide\">PCBA Assembly Test and Quality Guide\u003C/a>\nCompanion page for the broader inspection-and-test stack used across this guide.\u003C/p>\n\u003C/li>\n\u003Cli>\u003Cp>\u003Ca href=\"/en/blog/xray-inspection\">X-Ray Inspection in PCBA\u003C/a>\nCompanion page for the hidden-joint inspection boundary that neither SPI nor AOI replaces.\u003C/p>\n\u003C/li>\n\u003C/ol>\n\u003Ca id=\"author\">\u003C/a>\n\u003Ch2 id=\"author-and-review-information\" data-anchor-en=\"author-and-review-information\">Author and review information\u003C/h2>\n\u003Cul>\n\u003Cli>Author: APTPCB PCBA inspection content team\u003C/li>\n\u003Cli>Technical review: SMT process control and inspection engineering team\u003C/li>\n\u003Cli>Last updated: 2026-05-13\u003C/li>\n\u003C/ul>\n\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/en/blog/pcba-assembly-test-quality-guide\">PCBA Assembly Test and Quality Guide\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/pcba/spi-inspection\">SPI Inspection\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/pcba/aoi-inspection\">AOI Inspection\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/pcba/testing-quality\">Testing & Quality\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/pcba/xray-inspection\">X-Ray Inspection\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/aoi-inspection-pcba\">What AOI Inspection in PCBA Checks\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/quote\">quote page\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,15,16,17,18],"spi vs aoi","spi inspection","aoi inspection","pcba inspection","smt process control","spi-vs-aoi-when-to-run-each-in-pcba",{"blog":21,"breadcrumb":30,"faq":44},{"@context":22,"@type":23,"headline":4,"description":5,"image":8,"url":24,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":25,"articleSection":7,"author":26,"publisher":29},"https://schema.org","BlogPosting","https://aptpcb.com/en/blog/spi-vs-aoi-when-to-run-each-in-pcba","spi vs aoi, spi inspection, aoi inspection, pcba inspection, smt process control",{"@type":27,"name":28},"Organization","APTPCB",{"@type":27,"name":28},{"@context":22,"@type":31,"itemListElement":32},"BreadcrumbList",[33,38,42],{"@type":34,"position":35,"name":36,"item":37},"ListItem",1,"Home","https://aptpcb.com/",{"@type":34,"position":39,"name":40,"item":41},2,"Blog","https://aptpcb.com/en/blog",{"@type":34,"position":43,"name":19,"item":24},3,{"@context":22,"@type":45,"mainEntity":46},"FAQPage",[47,53,57,61,65],{"@type":48,"name":49,"acceptedAnswer":50},"Question","Is SPI the same as AOI?",{"@type":51,"text":52},"Answer","No. SPI checks solder paste deposition before later SMT stages. AOI checks visible assembly features later in the process.",{"@type":48,"name":54,"acceptedAnswer":55},"If a board passes SPI, can it still fail AOI?",{"@type":51,"text":56},"Yes. A board can pass paste inspection and still develop visible placement or solder-related issues later.",{"@type":48,"name":58,"acceptedAnswer":59},"If a board passes AOI, do I still need X-ray?",{"@type":51,"text":60},"Sometimes yes. AOI does not replace hidden-joint inspection where concealed solder areas need evidence.",{"@type":48,"name":62,"acceptedAnswer":63},"Can AOI replace ICT or flying probe?",{"@type":51,"text":64},"No. AOI is an optical method. ICT and flying probe are electrical methods for different defect classes.",{"@type":48,"name":66,"acceptedAnswer":67},"What is the biggest planning mistake in SPI vs AOI discussions?",{"@type":51,"text":68},"Treating them as interchangeable inspection names instead of keeping the stage boundary and defect ownership clear.",{"pcbManufacturingColumns":70,"capabilityColumns":195,"resourceColumns":226,"pcbaColumns":266},[71,119,148,177],{"heading":72,"links":73},"PCB Product Families",[74,77,80,83,86,89,92,95,98,101,104,107,110,113,116],{"label":75,"path":76},"FR-4 PCB","/pcb/fr4-pcb",{"label":78,"path":79},"High-Speed PCB","/pcb/high-speed-pcb",{"label":81,"path":82},"Multilayer PCB","/pcb/multilayer-pcb",{"label":84,"path":85},"HDI PCB","/pcb/hdi-pcb",{"label":87,"path":88},"Flexible PCB","/pcb/flex-pcb",{"label":90,"path":91},"Rigid Flex PCB","/pcb/rigid-flex-pcb",{"label":93,"path":94},"Ceramic PCB","/pcb/ceramic-pcb",{"label":96,"path":97},"Heavy Copper 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